Evaluación de la fiabilidad de microprocesadores COTS mediante las infraestructuras de depuración On-Chip

José Isaza-González, Alejandro Serrano-Cases, Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez

Resumen


Este artículo presenta una herramienta de inyección de fallos y la metodología para la realización de campañas de inyección de Single-Event-Upsets (SEUs) en microprocesadores Commercial-off-the-shelf (COTS). Este método utiliza las ventajas que ofrecen las infraestructuras de depuración de los microprocesadores actuales, además del depurador estándar de GNU (GDB) para la ejecución y depuración de los programas de pruebas. Los experimentos desarrollados sobre microprocesadores reales, así como en las máquinas virtuales, demuestran la viabilidad y la flexibilidad de la propuesta como una solución de bajo costo para evaluar la fiabilidad de los microprocesadores COTS

Palabras clave


Commercial-off-the-shelf (COTS); depuración integrada en el chip; efectos de la radiación; fiabilidad de microprocesadores; inyección de fallos; errores lógicos

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Referencias


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